LOADBench：开源模拟芯片设计机器学习数据集与基准
LOADBench: A Large Open Analog Dataset and Benchmark for Machine Learning in IC Design
做模拟电路机器学习的可以看看，100 多个运放拓扑加 6 个统一基准任务，终于能公平对比各家方法了。
论文发布 LOADBENCH，一个面向模拟 IC 设计机器学习的开源数据集。数据集包含 100 多种运算放大器拓扑（1、2、3 级），基于 SkyWater130 PDK 构建，每个拓扑附带结构与功能标注、对称性约束、Ngspice testbench，以及 NSGA-II 多目标尺寸优化产生的约 10³ 组 Pareto 最优解和 10⁶ 组中间尺寸-性能配对。在此数据上定义了 6 个基准任务：逆尺寸设计、拓扑选择、子电路分类、结构电路生成、Pareto 成员预测和多目标优化。数据与标注以开源许可发布，用于解决以往论文各自使用封闭数据集、结果无法比较的问题。
LOADBench: A Large Open Analog Dataset and Benchmark for Machine Learning in IC Design
Machine learning (ML) for analog IC design is constrained by limited open data and the absence of standardized evaluation: results reported in different papers are typically obtained on bespoke, often closed, datasets and with ad-hoc metrics, leaving comparisons across methods unreliable. We address both gaps with a large opensource dataset and a suite of standardized benchmarks. The dataset contains more than 100 operational amplifier (opamp) topologies (1-, 2-, and 3-stage) in the SkyWater130 PDK, each shipped with structural and functional annotations, topology-specific sizing constraints (symmetry and sizing rules), an Ngspice testbench, and a multi-objective NSGA-II sizing run producing around 103 Pareto-optimal and 106 intermediate sizing-performance pairs per topology. On top of this data we define six benchmark tasks with precise protocols: inverse sizing, topology selection, sub-circuit classification, structural circuit generation, Pareto-membership prediction, and multi-objective optimization. Thus, the data presented here constitutes the most comprehensive dataset for ML development in over four decades of analog IC design automation. The dataset, ground-truth annotations, and reference implementations of the metric-defining routines are released under an open license, enabling reproducible and directly comparable evaluation across heterogeneous analog design automation methods.
